The present invention relates to a semiconductor memory device and a manufacturing method of the same, and more particularly to a dynamic type semiconductor memory device, such as a dynamic random access memory (DRAM) and a manufacturing method of the same.
In a photolithography step, in order to prevent a reflection from a base and to control a line width with a high accuracy, a process uses various kinds of anti-reflection films. Above all, a coating type anti-reflection film simplifies a formation process so that it may be widely used.
A surface of a base of a semiconductor substrate is not necessarily flat. Accordingly, patterning is sometimes performed on an uneven plane out of-necessity. FIGS. 10A and 10B are sectional views showing an example of formation steps of a conventional DRAM having a trench capacitor. For example, as shown in FIG. 10A, a conventional DRAM having a trench capacitor is formed, according to a well known method. After a trench capacitor 102 is formed in a semiconductor substrate 101 using a mask 107, an anti-reflection film 103 is coated. In this case, the surface of the substrate 101 where the trench capacitor 102 is formed includes a concave portion 104 and a convex portion 105, which is the portion surrounded by the concave portion 104. The anti-reflection film 103 is coated according to the unevenness on the surface of the substrate 101 serving as the base. Specifically, the anti-reflection film 103 is coated according to a step difference formed in an upper portion of the trench capacitor 102.
Thereafter, a photoresist Process is conducted to form an element separation layer, and further a mask material 107 and the substrate 101 are subjected to working, such as an etching, using a photoresist pattern 106 as a mask. The etching utilizes an etching rate difference between the mask material 107 and the substrate 101. Subsequently, as is shown in FIG. 10B, an element separation insulating film 108 is formed in the worked portion of the substrate 101.
However, the photoresist layer serving as the mask material is formed more thickly on the trench capacitor 102 than on other portions, according to the unevenness (formed by the concave and convex portions 104 and 105) due to the step difference in the upper portion of the trench capacitor which is formed on the surface of the substrate 101. For this reason, the conventional DRAM having the trench capacitor has a problem that a pattern resolution is deteriorated. Namely, the controllability for a pattern accuracy of an element isolation is deteriorated.
Furthermore, the anti-reflection film is thick at the step difference formed in the upper portion of the trench capacitor, depending on a material of the anti-reflection film. For this reason, in order to work the anti-reflection film which is thick, much of the photoresist is consumed. Therefore, the working for the base is cumbersome. This trend becomes more troublesome as micronization of the element size is promoted.
From a viewpoint of the foregoing circumferences, the present invention was made. An object of the present invention is to provide a semiconductor memory device in which the controllability for a pattern accuracy of an element separation is not deteriorated and a working for a base is easy to perform not withstanding local uneven portions on a surface of a semiconductor substrate, and to provide a manufacturing method of the same.
A manufacturing method of a semiconductor memory device of the present invention comprises the steps of: a step for forming a first mask layer on a surface of a semiconductor substrate having local concave and convex portions for flattening the substrate; a step for removing the first mask layer formed on the convex portion of the semiconductor substrate; and a step for selectively working the convex portion using the first mask left in the concave portion as a mask.
In a manufacturing method of a semiconductor memory device of the present invention in which a trench is formed of a mask material formed on a semiconductor substrate, a diffusion layer is formed in a lower portion of the trench, a first filling layer is deposited on an inner wall of the trench, an oxide film and a second filling layer are deposited in an upper portion of the trench, and a third filling layer is deposited on the oxide film and the second filling layer, the improvement further comprising: a step for forming an element separation layer in a self-alignment with the first to third filling layers formed in the trench. A semiconductor memory device of a memory cell structure having a trench capacitor of the present invention comprises: a trench formed of a mask material worked on a semiconductor substrate; a diffusion layer, formed in the semiconductor substrate, by applying heat to an oxide film layer left at a lower portion of the trench; a first filling layer deposited on an inner wall of the trench; an oxide film formed in an upper portion of the trench; a second filling layer deposited in the upper portion of the trench as well as the inside of the oxide film; and a third filling layer deposited on the oxide film and the second filling layer, and an element separation layer formed in a self-alignment with the first to third filling layers formed in the trench.
According to the present invention, after the mask material on the convex portion in the semiconductor substrate is removed, the semiconductor substrate is worked utilizing the difference between the etching rates of the semiconductor substrate and the mask member buried in the concave portion of the semiconductor substrate, whereby the resist pattern can be made thin and a more micronized pattern can be formed. Moreover, since the convex portion having a different etching rate can be formed in a self-alignment with the concave portion formed in the semiconductor substrate, the formation of a pattern with more fineness is possible. Furthermore, when the present invention is applied to the memory cell having the trench capacitor, formation of the element separation layer in a self-alignment with the trench capacitor is possible, whereby a high integration of the memory cell also is possible. Still furthermore, since the trench filling structure can be kept invariable regardless of the mis-alignment of the trench pattern with the element separation pattern, a high manufacturing yield can be obtained.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.